CV

Education

• B.Eng in the Department of Electrical Engineering, City University of Hong Kong, 2020
• Ph.D in the Department of Electrical Engineering, City University of Hong Kong, 2024 (expected)

Work Experience

• Dec 2023 — May 2024: Research Intern in Huawei HK
  • Research Intern - Huawei 2012 Laboratory, Theory Laboratory
  • Participated in a cluster system development project, responsible for optimizing the low-level program blocks.
  • Conducted several internal talks, technology sharings. And generated technical report.

Research Experience

• July 2020 — June 2022: Optimised Post-Quantum Cryptographic System on FPGA
  • Ph.D. Candidate - City University of Hong Kong, Hong Kong
  • Proposing a novel NTT variant utilizing the split-radix method, to reduce the computing complexity compared to traditional NTT method.
  • Designing a highly efficient post-quantum crypto-system enhanced by the proposed split-radix NTT algorithm, showing significant performance improvements over the state-of-the-art designs on Xilinx Artix-7 FPGA.
  • Developing a deep understanding of hardware systems and cryptography, and technical writing skills to produce high-quality research publications.
  • Supervisor: Prof. Ray Cheung
• May 2020 — Feb 2022: Secure RISC-V Platform for IoT Devices
  • Ph.D. Candidate - City University of Hong Kong, Hong Kong
  • Conducting literature reviews and experimental analyses to evaluate the feasibility of implementing post-quantum cryptography, AES, and ECDSA on constrained devices with limited power and memory resources.
  • Designing a hardware accelerator for the quantum-resistant cryptographic algorithm that can be extended to secure RISC-V IoT processors, leveraging knowledge of hardware design and cryptography.
  • Collaborating with PI and other researchers on the project to design and implement the hardware accelerator and evaluating its effectiveness in secure IoT platforms.
  • Supervisor: Prof. Ray Cheung
• May 2019 — Aug 2019: Hardware Security
  • Research Assistant - LIRMM, Montpellier, France
  • Conducting a feasibility study on implementing the PicoRV32 processor on FPGA for a lightweight SoC platform.
  • Designing a hardware trojan in the PicoRV32 processor and attacked the AES program via simulation as part of the feasibility study on the lightweight SoC platform.
  • Developing strong problem-solving skills, and experience with FPGA design and simulation tools.
  • Working effectively both independently and as part of a team in a fast-paced and dynamic research environment.
  • Supervisor: Dr. Sophie Dupuis
• May 2019 — May 2020: Post-Quantum Cryptographic Hardware Design
  • Final Year Project - City University of Hong Kong, Hong Kong
  • Implemented a quantum-resistant cryptographic algorithm named as the Binary Ring LWE algorithm (BRLWE) in C, accelerated by an optimized NTT multiplication algorithm.
  • Conducted a hardware/software co-design, resulting in an SoC platform called Brlwesoc with UART port and the BRLWE C program running on.
  • Implemented the Brlwesoc on Lattice iCE40-HX8K FPGA board. Space, timing analysis and accuracy analysis are performed and the comparison on different parameter sets of the BRLWE is presented and discussed.
  • Supervisor: Prof. Ray Cheung

Selected Awards

• CityU EE Graduate Research Seminar Awards - First Prize - Semester A 2022/23
• 2023 IC Design Invitational Competition for College Students from Across-the-Taiwan-Straits, Hong Kong and Macau (2023年海峡两岸暨港澳大学生集成电路与电子设计邀请赛) - First Prize - Sept 2023
• Research Tuition Scholarship (RTS) - Full Tuition Fee - Academic Year 2023/24
• 2023 Guangdong Province Computer Society Outstanding paper award - 3rd Prize - - Jan 2024

Skills

• Coding Languages: Verilog HDL, VHDL, SpinalHDL, Scala, C/C++, Python, MATLAB.
• Linux x86 Development & Development: Perf, Intel VTune Profilier.
• Hardware Design Tools: Xilinx Vivado, Xilinx Vivado HLS, Verilator, VCS.
• Languages: Mandarin (native), English (proficient), Cantonese(basic).

Publications

Algorithm-Hardware Co-Design of Split-Radix Discrete Galois Transformation for KyberKEM

G. Li, D. Chen, G. Mao, W. Dai, A. I. Sanka and R. C. C. Cheung, "Algorithm-Hardware Co-Design of Split-Radix Discrete Galois Transformation for KyberKEM," in IEEE Transactions on Emerging Topics in Computing, doi: 10.1109/TETC.2023.3270971.

High-performance and Configurable SW/HW Co-design of Post-quantum Signature CRYSTALS-Dilithium

Gaoyu Mao, Donglong Chen, Guangyan Li, Wangchen Dai, Abdurrashid Ibrahim Sanka, Çetin Kaya Koç, and Ray C. C. Cheung. 2023. High-performance and Configurable SW/HW Co-design of Post-quantum Signature CRYSTALS-Dilithium. ACM Trans. Reconfigurable Technol. Syst. 16, 3, Article 44 (September 2023), 28 pages. https://doi.org/10.1145/3569456

REALISE-IoT: RISC-V Based Efficient and Lightweight Public-key System for IoT Applications

Gaoyu Mao, Yao Liu, Wangchen Dai, Guangyan Li, Zhewen Zhang, Alan H. F. Lam, and Ray C. C. Cheung, "REALISE-IoT: RISC-V Based Efficient and Lightweight Public-Key System for IoT Applications," in IEEE Internet of Things Journal, doi: 10.1109/JIOT.2023.3296135.

Teaching

EE5815 Topics in Security Technology

EE3220 Embedded System Design

EE3220 System-on-Chip Design

EE5805 Java Network Programming